1. Field
The present application relates to a semiconductor memory cell including a redundancy memory cell which relieves defects.
2. Description of Related Art
Test time of the semiconductor memory tends to increase with an increase in memory capacity. Japanese Laid-open Patent Publication No. 3-37900, Japanese Laid-open Patent Publication No. 2003-168299 and Japanese Laid-open Patent Publication No. 11-176188 disclose techniques for reducing the test time of the semiconductor memory. To reduce the test time, the above patent documents disclose compression test methods in which one write data signal is written in a plurality of memory cells with different addresses.